/65th IEDM highlights processors, 3D integration, quantum computing and photonics (via Qpute.com)

65th IEDM highlights processors, 3D integration, quantum computing and photonics (via Qpute.com)

This year’s year’s 65th annual IEEE International Electron Devices Meeting (IEDM), to be held Dec. 7-11 at the San Francisco Hilton Hotel will highlight:

  • Advancing scaling to the next node — TSMC will unveil a complete 5nm technology platform, its most advanced yet (paper #36.7), while two plenary speakers will come at it from different viewpoints – ASML’s President and CTO  Martin van den Brink, and Intel Senior Fellow Robert Chau.
  • A 3D breakthrough — Intel will present a novel 3D heterogeneous integration process that offers much promise for future highly scaled nodes. (#29.7)
  • Quantum computing – Besides an entire Focus Session dedicated to the topic, there’s also a paper from imec that represents the first step toward developing a systematic approach to the design of quantum computing devices. (#39.5)
  • Embedded STT-MRAM and other non-volatile memories (NVMs) are getting quite a lot of attention. TSMC will describe a versatile 22nm STT-MRAM technology for AI (#2.7) while Intel will talk about STT-MRAMs for use in L4 cache applications (#2.4).  A Plenary talk by Kazu Ishimaru, Senior Fellow at Kioxia (formerly Toshiba Memory), will give a vision of the future for NVM technologies.
  • 5G and beyond – Many papers will present ways to integrate III-V materials with silicon to make ultra-fast devices for 5G and other uses, which are compatible with conventional CMOS technology.  Papers #17.3 from Intel and #9.1 from Imec are two examples.
  • Silicon photonics – A 400 Gbit/s platform technology from ST Microelectronics (#33.1)
  • Giving forceps the sense of touch – See paper #18.2 from Japan’s Kagawa University.

Themed: “Innovative Devices for an Era of Connected Intelligence”, the event has a technical programme of 238 papers given by many of the world’s top scientists and engineers in the field.

It will be preceded by a series of 90-minute tutorials on Saturday, Dec. 7, and by day-long short courses on Sunday, Dec. 8.

“The number of papers submitted to the IEDM conference this year is the highest in recent years, no doubt driven by the fact that new, fast-growing applications for semiconductors require different types of devices,” said Rihito Kuroda, IEDM 2019 Publicity Chair and Associate Professor at Tohoku University. “As a result, several important trends are apparent from this year’s technical program. One is the increasing interest in using 3D techniques to achieve higher levels of integration. Another is the number of papers describing complete technology platforms in wide-ranging areas, from mainstream CMOS scaling to silicon photonics, power devices and human-machine interfaces.”

“We see that 3D monolithic integration is really coming on strong, because there are so many different reasons and ways to do it to meet the needs of diverse applications,” said Dina Triyoso, IEDM 2019 Publicity Vice Chair and Technologist at TEL Technology Center America. “Another development which is very apparent is the trend toward design/technology co-optimization, a sign of unprecedented interdisciplinary collaboration between the people who design today’s complex devices and the people who design the manufacturing processes to build them.”

90-Minute Tutorials – Saturday, Dec. 7

The 90-minute Saturday tutorial sessions on emerging technologies have become a hugely popular part of IEDM. They are presented by experts in the fields, the goal being to bridge the gap between textbook-level knowledge and leading-edge current research. The topics for 2019 are:

  • Oxide Semiconductors and Applications,Hideo Hosono, Tokyo Institute of Technology
  • In-Memory Computing for AI, Abu Sebastian, IBM
  • Magnetic Field Sensors, Keith Green, TI
  • Cryogenic MOSFET Modeling, Christian Enz, EPFL
  • Ferroelectric Memories & Beyond, Johannes Mueller, GLOBALFOUNDRIES
  • 3D Sequential Integration, Perrine Batude, Leti

Short Courses – Sunday, Dec. 8

Early registration for the full-day Sunday Short Courses is recommended, as they are often sold out. They offer the opportunity to learn about important areas and developments, and to network with global experts.

  • Technology Scaling in the EUV Era and Beyond, organized by Wook-Hyun Kwon, Samsung
  • Future of Computing: From Core to Edge Computing, Karim Arabi, Atlazo
  • Device Technology for 3nm and Beyond, Jin Cai, TSMC
  • EUV Lithography Technology, Ho Chul Kim, Samsung
  • Design Technology Co-Optimization for 3nm and Beyond, Lars Liebmann, TEL
  • Novel Interconnect Techniques for Advanced Devices Beyond 3nm Technologies, Chris Wilson, imec
  • Ultra-Low Power Devices for Advanced Signal Processing Architectures, Arokia Nathan, Univ. of Cambridge
  • Technologies for Memory-Centric Computing, organized by Ali Keshavarzi, Stanford Univ.
  • Memory Devices and Selectors for High-Density Memory Technologies, Alessandro Calderoni, Micron Technology
  • 3D-Stacked DRAM Technology and Function-in-Memory Solution, Kyomin Sohn, Samsung
  • Novel Memory Technologies for Advanced Nodes, Oleg Golonzka, Intel
  • Emerging Technologies for Memory-Centric and Low Power Architectures, Edith Beigne, Facebook
  • Towards Memory-Centric Autonomous Systems: A Technology and Device Perspective, Arijit Raychowdhury, Georgia Tech.
  • 3D NAND: Challenges and Potentials, Jian Chen, Western Digital

Plenary Presentations – Monday, Dec. 9

  • Process and Packaging Innovations for Moore’s Law Continuation and Beyond, Robert Chau, Intel Senior Fellow
  • Continued Scaling in Semiconductor Manufacturing Enabled by Advances in Lithography, Martin van den Brink, President and CTO, ASML
  • Future of Non-Volatile Memory: From Storage to Computing, Kazu Ishimaru, Senior Fellow, Kioxia (formerly Toshiba Memory)

Luncheon – Tuesday, Dec. 10

IEDM will have a career-focused luncheon this year featuring industry and scientific leaders talking about their personal experiences in the context of career growth. It will be moderated by Jungwoo Joh of Texas Instruments, and this year’s speakers will be Ramune Nagisetty, Senior Principal Engineer, Intel and Linda Somerville, Vice President, Micron Technology.

Evening Panel Session – Tuesday evening, Dec. 10

IEDM 2019 will offer attendees an evening session where experts will give their views on important industry topics in a fun, engaging format. Audience participation is encouraged to foster an open and vigorous exchange of ideas. The title of this year’s evening panel is “Rest in Peace Moore’s Law, Long Live Artificial Intelligence,” organized by Vijay Narayanan, IBM Fellow and Manager, Materials Research.

Vendor Exhibition/Poster Sessions

  • A vendor exhibition will be held once again.
  • This year two poster sessions will be held, one on MRAM technology organized by the IEEE Magnetics Society, the other a student research showcase hosted by the Semiconductor Research Corporation and IEEE EDS.

Further information about IEDM

The 2019 IEDM will be held at the Hilton San Francisco Union Square hotel. For registration and other information

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