SAN JOSE, Calif., Jan. 27, 2021 — D2S, a supplier of GPU-accelerated solutions for semiconductor manufacturing, has introduced the seventh generation of its computational design platform (CDP), a scalable processing solution for simulation-based semiconductor design and manufacturing applications. D2S CDPs are architected to ensure the high speed, accuracy and reliability required for 24×7 cleanroom production environments. Powered by NVIDIA Ampere architecture-based A40 GPUs, the D2S seventh-generation CDP achieves more than 1,800,000,000,000,000 floating point operations per second (1.8 PFLOPS) of single precision (SP) processing speed per rack. D2S has already received multiple orders for the seventh-generation CDP, bringing the total number of CDPs across all platform generations installed worldwide to more than 40.
Computing applications used in semiconductor design and manufacturing have ever-increasing requirements for speed, accuracy and reliability as the leading-edge nodes – fueled by high-performance computing and deep learning – enter the 5-nm era. These applications include inverse lithography technology (ILT) to produce curvilinear shapes on photomasks, mask process correction (MPC) for multi-beam mask writing to process these incredibly complex mask shapes, curvilinear mask and wafer simulation and verification, and deep learning for photomask and semiconductor manufacturing. D2S software applications are based on NVIDIA CUDA, a parallel computing platform and programming model for GPUs. The newest-generation CDP with GPU acceleration from D2S offers 1.8 PFLOPS (SP) of computing power in a one-rack CDP – enabling simulation-based accurate manipulation and analysis, particularly for curvilinear shapes, which are not possible with CPU-only applications.
According to Aki Fujimura, CEO of D2S, “For more than a decade, the semiconductor industry has recognized that curvilinear shapes on photomasks computed by ILT produce the best wafer quality, but adoption has been hindered by long mask write times using conventional variable-shaped beam (VSB) writing, as well as long ILT runtimes on CPU-based computing platforms. With our latest-generation computational design platform, which utilizes the NVIDIA A40 GPU, implementing and verifying curvilinear ILT is now practical in semiconductor manufacturing. The A40 is an incredible processor that represents a huge leap forward in price/performance. Unlike other approaches that are principally designed for CPU-based computing, our algorithms are redesigned from the ground up to be single-instruction-multiple-data (SIMD), and our CDPs are co-designed with the software that take full advantage of GPU acceleration. With the SIMD computing approach, just as for video games and image processing, there is no difference in runtime whether shapes are rectilinear or curvilinear, unlike for traditional CPU-based algorithms that suffer from longer runtimes when the number of vertices increases. From creating and processing complex mask shapes to helping to write the masks and analyzing mask SEM data to providing deep learning engines, our GPU-accelerated solutions help customers to achieve manufacturing success on their leading-edge mask and chip designs.”
“The entire semiconductor industry faces increasingly difficult challenges with each new process node,” said Jerry Chen, Head of Manufacturing Business Development at NVIDIA. “GPU acceleration has inevitably become the industry standard for computational lithography, and we look forward to leveraging the manufacturing benefits of D2S’s latest generation solution, based on the NVIDIA Ampere architecture, for our own future products.”
D2S is a supplier of GPU-accelerated solutions for semiconductor manufacturing. The company provides simulation-based custom solutions to leading equipment partners and D2S TrueMask solutions to photomask and wafer manufacturers. D2S TrueMask solutions use the D2S Computational Design Platform to enable advanced photomask designs using complex rectilinear and curvilinear shapes for superior wafer quality within practical, cost-effective write-times. D2S is the managing sponsor of the eBeam Initiative and a founding member of the Center for Deep Learning in Electronics Manufacturing (CDLe). Headquartered in San Jose, Calif., the company was founded in 2007. For more information, see: www.design2silicon.com.
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