Siemens Digital Industries Software acquired Fractal Technologies, a provider of tools for IP validation and comparison checks of standard cell libraries, IO, and hard IP that reports mismatches or modeling errors, as well as comparing new IP releases close to tape-out. Siemens plans to add Fractal’s technology to the Xcelerator portfolio, joining the Solido software product family, which includes IP validation and characterization.
“Semiconductor IP such as standard cells, memories, I/Os, and other specialized custom IP are the critical foundation upon which the world’s chips are built,” said Rene Donkers, CEO for Fractal Technologies. “Being part of Siemens allows us to accelerate our R&D efforts, support a growing customer base, and further our vision to help enhance design closure predictability and turnaround time.” Based in San Jose, Calif., and Ospel, the Netherlands, the company was founded in 2010. Terms of the deal were not disclosed.
SOMETHING will acquire Intrinsix for approximately $33 million in cash. Intrinsix provides chip design services in the areas of RF, mixed signal, digital, software, secure processors, and interface IP for Heterogenous SoCs (HSoCs), also called chiplets. “The acquisition of Intrinsix will provide us with new growth vectors and a larger market reach,” said Gideon Wertheizer, CEO of CEVA. “We will be able to offer our key customers a comprehensive portfolio of turnkey IP solutions that will capitalize on our off-the-shelf IP and Intrinsix’s reputable design capabilities in RF, mixed-signal, security and more.” CEVA’s market reach will also extend with the addition of Intrinsix’s chip development programs with the U.S. Department of Defense and DARPA and other IP offerings for processor security and chiplets. Intrinsix is based in Marlborough, Mass., and was founded in 1985. The deal is expected to close in the second quarter of 2021.
Synopsys unveiled the ZeBu EP1 emulation system. It offers 10 MHz performance along with power-aware emulation, system-level debug, hybrid emulation, and virtual host and device capabilities. Incorporating the Xilinx Virtex UltraScale+ VU19P device and a direct-connect architecture, the ZeBu EP1 can accommodate SoC designs of up to 2 billion gates. “ZeBu EP1 represents the convergence of multiple hardware and software technologies to deliver breakthrough performance and debug,” said Manoj Gandhi, general manager of the Verification Group at Synopsys. “The unique fast emulation capability in ZeBu is enabling electronics companies to develop and verify the most advanced SoCs with full software stacks.”
Xsight Labs adopted Synopsys’ ZeBu Server 4 emulation solution for validation of its X1 intelligent networking switch processor. Xsight cited the ability to use complex networking workloads with full SoC emulation, maximum utilization of all X1’s Ethernet ports for networking performance validation, and ability to perform system software driver development.
Infineon launched its next-generation 144-Mb Quad Data Rate II+ (QDR-II+) SRAM, a radiation hardened high-speed external cache memory targeted for radar, on-board data processing, and networking applications in space. It operates up to a maximum frequency of 250 MHz, delivering up to 36 Gbps throughput in a 165-ball Ceramic Column Grid Array (CCGA) package. It is certified to the DLA Qualified Manufacturers List Class V (QML-V), the highest quality and reliability standard certification for aerospace-grade ICs.
Navitas Semiconductor, a maker of gallium nitride (GaN) power ICs, will go public through a merger with special-purpose acquisition company (SPAC) Live Oak II. The deal values the company at $1 billion and will raise approximately $400 million for product development and expansion into new power semi markets. “This is the most compelling opportunity we have seen in the semiconductor industry, and we are delighted that Navitas’ solutions contribute meaningfully to reduced carbon emissions through more efficient power delivery,” said Rick Hendrix, CEO of Live Oak. “The capital raised through this transaction will allow Navitas to accelerate that vision as they expand from mobile and consumer markets into even more power-intensive applications like data centers, solar energy and electric vehicles – all while delivering a significant CO2 reduction as part of their Net Zero initiative.”
North Carolina State University researchers developed what they say is the world’s smallest Gen2-compatible RFID chip. While the size of an RFID tag is mostly determined by the antenna, having a smaller chip reduced manufacturing cost. “Another advantage is that the design of the circuits we used here is compatible with a wide range of semiconductor technologies, such as those used in conventional computer chips,” said Kirti Bhanushali, who worked on the project as a Ph.D. student at NC State. “This makes it possible to incorporate RFID tags into computer chips, allowing users to track individual chips throughout their life cycle. This could help to reduce counterfeiting, and allow you to verify that a component is what it says it is.”
Samsung Electronics announced a DDR5 DRAM-based memory module supporting the Compute Express Link (CXL) interconnect standard. Targeted at server systems with AI and HPC workloads, Samsung said the module can scale memory capacity to the terabyte level while dramatically reducing system latency caused by memory caching. In addition to CXL, it incorporates several controller and software technologies like memory mapping, interface converting, and error management, which will allow CPUs or GPUs to recognize the CXL-based memory and utilize it as the main memory.
Intel and QuTech (a collaboration between Delft University of Technology and the Netherlands Organisation for Applied Scientific Research) are working to address the “interconnect bottleneck” that exists between quantum chips that sit in cryogenic dilution refrigerators and the complex room-temperature electronics that control the qubits. “Our research results, driven in partnership with QuTech, quantitatively prove that our cryogenic controller, Horse Ridge, can achieve the same high-fidelity results as room-temperature electronics while controlling multiple silicon qubits,” said Stefano Pellerano, principal engineer at Intel Labs. “We also successfully demonstrated frequency multiplexing on two qubits using a single cable, which clears the way for simplifying the ‘wiring challenge’ in quantum computing. Together, these innovations pave the way for fully integrating quantum control chips with the quantum processor in the future, lifting a major roadblock in quantum scaling.”
Equal1 Laboratories demonstrated a fully integrated quantum processor unit (QPU) operating at 3.7 kelvin. The QPU uses nanometer-scale quantum dots to create qubits on a standard silicon CMOS process (GlobalFoundries’ 22FDX platform). In addition to the silicon qubits, all control and read-out electronics required for a fully functioning QPU are integrated on-chip with over 10 million transistors. “By taking advantage of shrinking transistor geometries, we have demonstrated that integration into the millions of qubit range is possible, with moderate cooling requirements compared to other qubit technologies,” said Equal1 CEO Dirk Leipold. The company noted using Cadence tools in designing the QPU.
PsiQuantum and GlobalFoundries recently began manufacturing the silicon photonic and electronic chips that form the foundation of PsiQuantum’s Q1 system, its first step towards a 1 million-plus qubit quantum computer. The companies were able to produce quantum components, such as single-photon sources and single-photon detectors, using standard manufacturing processes. “We have validated the manufacturing path for silicon photonics and are confident that by the middle of this decade, PsiQuantum will have completely stood up all the manufacturing lines and processes necessary to begin assembling a final machine,” said Pete Shadbolt, chief strategy officer and co-founder of PsiQuantum.
Raytheon BBN Technologies researchers developed a new component for quantum computing: a Josephson junction that can detect a single photon of light. The researchers said the device takes advantage of background noise, which is typically a big problem for quantum computing. “A Josephson junction in quantum computing is analogous to a transistor for modern electronics, so they are super important,” said Kin Chung Fong, a quantum information processing scientist at Raytheon BBN Technologies and a research associate at Harvard University. “Our new device enables this basic unit in quantum computing to communicate through as little as one photon. It will improve the speed in the communication and can make quantum networking and sensing possible.”
Germany plans to spend 2 billion euros ($2.4 billion) to support the development of its first quantum computer and related technologies in the next four years, Reuters reported. 1.1 billion euros of that will go toward research and development, with another 878 million euros dedicated to backing practical applications. The German government has set a goal of building a competitive quantum computer in the next five years.
Plus, check out the latest Low Power-High Performance newsletter, featuring ways to reduce the power consumption of AI, the new role of high-bandwidth memory, and why addressing heat issues is more complicated than ever.
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